reset-handler-xtr.s 2.6 KB

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  1. .syntax unified
  2. .cpu cortex-m4
  3. .thumb
  4. @----------------------------------------------------------------------------------------------------------------------*
  5. @ *
  6. @ R E S E T H A N D L E R ( D O U B L E S T A C K M O D E ) F O R X T R *
  7. @ *
  8. @----------------------------------------------------------------------------------------------------------------------*
  9. @--- This is stack for background task
  10. BACKGROUND.STACK.SIZE = 32
  11. .section .bss.background.task.stack, "aw", %nobits
  12. .align 3 @ Stack should be aligned on a 8-byte boundary
  13. background.task.stack:
  14. .space BACKGROUND.STACK.SIZE
  15. @----------------------------------------------------------------------------------------------------------------------*
  16. @ See https://developer.arm.com/docs/dui0553/latest/2-the-cortex-m4-processor/21-programmers-model/213-core-registers
  17. .section ".text.reset.handler", "ax", %progbits
  18. .global reset.handler
  19. .type reset.handler, %function
  20. reset.handler: @ Cortex M4 boots with interrupts enabled, in Thread mode
  21. @---------------------------------- Run boot, zero bss section, copy data section
  22. bl start.phase1
  23. @---------------------------------- Set PSP: this is stack for background task
  24. ldr r0, =background.task.stack + BACKGROUND.STACK.SIZE
  25. msr psp, r0
  26. @---------------------------------- Set CONTROL register (see §B1.4.4)
  27. @ bit 0 : 0 -> Thread mode has privileged access, 1 -> Thread mode has unprivileged access
  28. @ bit 1 : 0 -> Use SP_main as the current stack, 1 -> In Thread mode, use SP_process as the current stack
  29. @ bit 2 : 0 -> FP extension not active, 1 -> FP extension is active
  30. movs r2, #2
  31. msr CONTROL, r2
  32. @--- Software must use an ISB barrier instruction to ensure a write to the CONTROL register
  33. @ takes effect before the next instruction is executed.
  34. isb
  35. @---------------------------------- Init
  36. svc #0
  37. @---------------------------------- This is the background task: turn off activity led
  38. @ Activity led is connected to PORTC:5 (#13)
  39. background.task: @ Only use R0, R1, R2, R3 and R12. Other registers are not preserved
  40. ldr r0, =0x400FF088 @ Address of GPIOC_PCOR control register
  41. movs r1, # (1 << 5) @ Port D13 is PORTC:5
  42. str r1, [r0] @ Turn off
  43. b background.task
  44. @----------------------------------------------------------------------------------------------------------------------*